OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 149

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
149 Fixed bug where disassemble command caused a segmentation fault chris 8419d 00h /
148 Replace single stepping patch that got overwritten chris 8419d 00h /
147 Initial checkin of instructions chris 8419d 16h /
146 Mofications to work with or1ksim JTAG based simulation chris 8419d 16h /
145 Modifications necessary for functional gdb debugging interface chris 8419d 16h /
144 Modifications necessary for functional gdb interface chris 8419d 16h /
143 Modifications necessary to work with JTAG or1ksim simulator chris 8419d 16h /
142 Modifications for a functional gdb environment chris 8419d 16h /
141 Added l_trap() chris 8419d 16h /
140 Modifications to work with or1ksim JTAG simulator chris 8419d 16h /
139 Modifications for functional gdb chris 8419d 16h /
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading		 markom 8422d 19h /
137 Added TRAP exception chris 8423d 18h /
136 Fixed the DSR/DRR debug register definitions which were stored backwards chris 8423d 18h /
135 Fixed a couple of bugs related to updating registers over JTAG
during debugging.		 chris 8423d 18h /
134 *** empty log message *** markom 8425d 18h /
133 moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode		 markom 8425d 18h /
132 Added option for socket libraries under Solaris chris 8426d 16h /
131 Initial checkin of the Debug Unit register descriptions chris 8426d 16h /
130 Initial checkin of the debug unit module chris 8426d 17h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.