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Rev	Log message	Author	Age	Path
1618	Import of or32 sepcific part of binutils port updated by Balint and Nog	phoenix	6818d 23h	/
1617	* empty log message *	phoenix	6818d 23h	/
1616	Import of or32 sepcific part of binutils port updated by Balint and Nog	phoenix	6818d 23h	/
1615	* empty log message *	phoenix	6818d 23h	/
1614	CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU)	phoenix	6829d 00h	/
1613	change default	phoenix	6834d 09h	/
1612	major optimizations for or32 target	phoenix	6834d 10h	/
1611	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'.		6837d 11h	/
1610	Update ChangeLog	nogj	6837d 11h	/
1609	0.2.0-rc2 release	nogj	6837d 11h	/
1608	Avoid scheduleing too many jobs, potentially underflowing the scheduler stack	nogj	6838d 05h	/
1607	Don't drop cycles from the scheduler	nogj	6838d 05h	/
1606	fix uninitialized reads	phoenix	6838d 10h	/
1605	Execute l.ff1 instruction	nogj	6845d 06h	/
1604	Fix dumphex/dumpverilog to not do unaligned memory access	nogj	6845d 06h	/
1603	Accept EM_OPENRISC as a valid machine	nogj	6846d 10h	/
1602	Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter.	lampret	6847d 08h	/
1601	fixed description of l.sfXXXi	lampret	6847d 09h	/
1600	Corrected mistake in pin assignation due to typo error in RC203 manual	jcastillo	6855d 10h	/
1599	Corrected Syn Script to add MMU memories	jcastillo	6855d 16h	/

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[/] - Rev 1618

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