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15 - UnFonctional Modifications.
- Change the "CP0" define to "EXCEPTION".
ameziti 6001d 21h /
14 Remove unnecessary files from project. ameziti 6002d 05h /
13 - To simplify the exception traitement: Instruction are executed serialy.
- Exception event must be treated CONCURRENTLY with the other event that stall the pipeline.
ameziti 6002d 05h /
12 To simplify the exception traitement: Instruction are executed serialy. ameziti 6002d 06h /
11 Exception event must be treated CONCURRENTLY with the other event that stall the pipeline. ameziti 6002d 06h /
10 Modification of the CP0. ameziti 6002d 07h /
9 When D-Cache miss, there's no need to stall MEMWB and freeze WB.
The solution is to flush MEMWB only.
ameziti 6002d 07h /
8 Enhancement of the "Controler specification doc". ameziti 6005d 07h /
7 Add Pipeline Controler specification documentation. ameziti 6006d 05h /
6 When D-Cache miss, there's no need to stall MEMWB and freeze WB.
The solution is to flush MEMWB only.
ameziti 6006d 07h /
5 Remove the Multiple Arithmetic Unit fonction.
- The Pipeline must stall when Mult/Div unit is busy.
- Whether there's a mflo or mfhi.
- see `define MULTIPLE_ALU
ameziti 6007d 05h /
4 Add Soc Image in the Specification documentation ameziti 6028d 07h /
3 This commit was manufactured by cvs2svn to create tag 'arelease'. 6029d 16h /
2 First Import the project on the opencores.org CVS server ameziti 6029d 16h /
1 Standard project directories initialized by cvs2svn. 6029d 16h /

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