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Rev Log message Author Age Path
287 add notes on FPGA implementation arniml 5896d 01h /
286 hierarchy update, RAM and ROM clarification arniml 5896d 01h /
285 generate D for synchronous implementation in clocked process arniml 5897d 02h /
284 better support for ISE/XST:
opc_table and opc_decoder merged into decoder_pack and decoder
arniml 5897d 02h /
283 update to new mnemonic decoder arniml 5897d 02h /
282 decouple bidir port T0 from P1
fixes testcase black_box/tx/t0
arniml 5898d 02h /
281 clarify testcase compilation arniml 5898d 02h /
280 added syn directory structure arniml 5899d 01h /
279 update arniml 5914d 00h /
278 initial check-in arniml 5914d 02h /
277 This commit was manufactured by cvs2svn to create tag 'rel_1_0'. 6395d 00h /
276 add change notes for release 1.0 arniml 6395d 00h /
275 fix sensitivity list arniml 6395d 22h /
274 revision 1.0 arniml 6395d 23h /
273 reset counter_q arniml 6413d 09h /
272 fix entity port names arniml 6417d 11h /
271 initial check-in arniml 6417d 11h /
270 fix component name arniml 6417d 12h /
269 update list for inclusion of t8243 testbenches arniml 6545d 00h /
268 io expander not suitable for dump compare arniml 6550d 00h /

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