OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 292

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
292 New directory structure. root 5582d 19h /
291 remove t48_opc_decoder component reference arniml 5894d 08h /
290 remove obsolete components arniml 5895d 10h /
289 This commit was manufactured by cvs2svn to create tag 'rel_1_1'. 5896d 06h /
288 updates for release 1.1 arniml 5896d 06h /
287 add notes on FPGA implementation arniml 5896d 06h /
286 hierarchy update, RAM and ROM clarification arniml 5896d 07h /
285 generate D for synchronous implementation in clocked process arniml 5897d 08h /
284 better support for ISE/XST:
opc_table and opc_decoder merged into decoder_pack and decoder
arniml 5897d 08h /
283 update to new mnemonic decoder arniml 5897d 08h /
282 decouple bidir port T0 from P1
fixes testcase black_box/tx/t0
arniml 5898d 07h /
281 clarify testcase compilation arniml 5898d 07h /
280 added syn directory structure arniml 5899d 06h /
279 update arniml 5914d 05h /
278 initial check-in arniml 5914d 08h /
277 This commit was manufactured by cvs2svn to create tag 'rel_1_0'. 6395d 05h /
276 add change notes for release 1.0 arniml 6395d 05h /
275 fix sensitivity list arniml 6396d 04h /
274 revision 1.0 arniml 6396d 04h /
273 reset counter_q arniml 6413d 14h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.