URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] - Rev 255

Rev	Log message	Author	Age	Path
255	Changed the PADS verilog description to minimize violations	creep	5583d 20h	/
254	Fixed a latch in the design	creep	5583d 20h	/
253	Changed the rw_mem signal name in the hierarchy	creep	5606d 21h	/
252	Added a stubs file for the pads.	creep	5606d 21h	/
251	Added the io wrapper	creep	5607d 00h	/
250	Synthesis script changed	creep	5607d 00h	/
249	Renamed the synthesis script	creep	5607d 20h	/
248	Added a low power synthesis script	creep	5612d 19h	/
247	Added the cpu mapped verilog	creep	5612d 19h	/
246	Added some older files plus the first syn script	creep	5614d 00h	/
245	Added a few dirs for the synthesis	creep	5614d 00h	/
244	Added a few dirs for the synthesis	creep	5614d 00h	/
243	Fixing STA_IDY bug	creep	5655d 16h	/
242	Bug regardind the STA_IDY opcode	creep	5655d 20h	/
241	Fixed half the problem with strange STA behavior.	creep	5656d 19h	/
240	Finally fixed the decimal mode!	creep	5656d 21h	/
239	Zero flag fixed for SBC while in Decimal Mode. Bug #34.	gabrieloshiro	5656d 22h	/
238	ALU file is linted.	creep	5659d 19h	/
237	Added a preliminary collision detection logic.	creep	5660d 20h	/
236	Added the video converter testbench to the repository.	creep	5661d 00h	/