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109 This continues the updates to the wishbone-uart conversion. It fixes several
bugs within wbuexec, and pipelines the compression scheme. Further, the
read codeword was adjusted so that a read of 8 can be requested with six-bits,
rather than requiring 12. Likewise, the dependence upon the read of 8 on
incrementing the address pointer has been removed. All told, the design
builds for a 200MHz Artix-7, and it has been tested with the CMod-S6. (Writing
flash seems to be one of the most comprehensive tests ...)
dgisselq 3046d 02h /
108 Minor documentation updates. dgisselq 3046d 13h /
107 Minor change. dgisselq 3046d 13h /
106 Minor, inconsequential changes. dgisselq 3046d 13h /
105 Mostly cosmetic changes. The Makefile now builds a couple more programs,
the documentation is better, etc.
dgisselq 3046d 13h /
104 Updates to the flash driver drawn from the S6SoC project. dgisselq 3046d 13h /
103 Added a SDSPI scope, and defined which of the four scopes it points to.
(It uses the configuration scopes position, if the configuration scope isn't
defined.)
dgisselq 3046d 13h /
102 Updated documentation. The documentation for these now also reflects that
these were drawn from an FPGA Library project, that is shared among many
FPGA builds.
dgisselq 3046d 13h /
101 Fixed the `defines at the top so that this can be built without any CPU.
This was then used to measure the impact of the CPU on the entire build, as
you could now build with no CPU, and then with a CPU to compare.
dgisselq 3046d 13h /
100 Includes updates so this can run at higher clocks speeds within an FPGA. dgisselq 3046d 13h /
99 Includes high-speed updates. rxuart and txuart will now run at 200MHz on
an Artix-7, so should not impact timing (any more) on the XuLA platform.
dgisselq 3046d 13h /
98 Updated copyright notices for the new year, to reflect that changes have been
made in 2016.
dgisselq 3046d 13h /
97 Latest working bit file, with all changes attached as of this date. dgisselq 3069d 17h /
96 Now accepts an SD-Card backing file, so that SD-Card reads *and* writes can be
tested.
dgisselq 3069d 17h /
95 Added write capability to the SD-SPI simulator. dgisselq 3069d 17h /
94 Fixes a bug which had caused the device to die artificially and early, just
simply because the program connecting to the simulator shut its pipe down before
getting our last message. We now ignore this signal and continue.
dgisselq 3069d 17h /
93 Oops -- missed adjusting the copyright. dgisselq 3069d 17h /
92 Fixes the problem whereby the master counters show when the user counters should
be showing and vice versa. Now the master counters show by default, together
with their correct labels. User counters are still available by pressing
'u' in the debugger, and the master counter display may be returned to by
pressing 'm' in the debugger.
dgisselq 3069d 17h /
91 Fixes bugs associated with an overflow of write acknowledgements in the
receiver. This helps keep our accesses aligned.
dgisselq 3069d 17h /
90 Reads and writes to the SD over SPI port now work. The card appears, as of now,
to be fully functional.
dgisselq 3069d 17h /

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