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Rev Log message Author Age Path
223 -- 0.3 David Burnette 8 April 2021 Added read-back of clk/transfer size
-- as well as a debug tag to confirm
-- read operation		 davidgb 1319d 06h /.
222 Added SPI master to project. Pick up Atlys rom davidgb 1319d 06h /.
221 Completed Atlys option davidgb 1319d 06h /.
220 checkin davidgb 1319d 06h /.
219 back out last change davidgb 1319d 12h /.
218 Added ROM variation for Digilent Atlys board davidgb 1319d 12h /.
217 Extended debug sw to show keyboard data. PS/2 keyboard now works on USB HID (you must use a PS/2 keyboard + PS/2-to-USB dongle for it to work). davidgb 1322d 10h /.
216 Get rid of warning about unconnected CLK0 pin davidgb 1322d 10h /.
215 Update project after switching to xilinx block ram davidgb 1322d 13h /.
214 Switch to Xilinx block ram davidgb 1322d 13h /.
213 updated project file davidgb 1322d 13h /.
212 Switched from VGA output to HDMI output. davidgb 1322d 13h /.
211 New version of VDU8 that has HDMI output. Still needs work refactoring clock signals. davidgb 1322d 13h /.
210 Check in code fragment implementing HDMI/TMDS encoding.
Derived from HDMI_test.v https://www.fpga4fun.com/HDMI.html (c) fpga4fun.com & KNJN LLC 2013		 davidgb 1322d 13h /.
209 Started adding in keyboard (not tested).
Added in green-only VGA output thru Pmod port to PmodVGA J2 port.
Started working on HDMI output		 davidgb 1322d 15h /.
208 swapped 32k and 16k ram to use block_spram. davidgb 1366d 16h /.
207 Updated design to pick up vdu8_spram (which uses parameterized ram for video memory instead of hard macros) davidgb 1366d 17h /.
206 Update comment/cleanup davidgb 1366d 17h /.
205 A new version of VDU8 that uses the parameterized xilinx ram "block_spram" for the video memory. davidgb 1366d 17h /.
204 patched up ram for zybo use davidgb 1366d 17h /.

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