URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] [.] - Rev 40

Rev	Log message	Author	Age	Path
40	This commit was manufactured by cvs2svn to create tag 'V10'.		6685d 10h	/.
39	first version	fisher5090	6685d 10h	/.
38	deleted	fisher5090	6685d 11h	/.
37	no message	fisher5090	6685d 11h	/.
36	no message	godzilla	6748d 19h	/.
35	no message	godzilla	6751d 19h	/.
34	Rewritten code.	godzilla	6751d 19h	/.
33	Rewritten code.	godzilla	6751d 19h	/.
32	no message	fisher5090	6769d 03h	/.
31	no message	fisher5090	6769d 03h	/.
30	no message	fisher5090	6797d 02h	/.
29	no message	fisher5090	6797d 12h	/.
28	First commit. 32-bit counter. Synthesizes with no errors in Xilinx XST.	mvpratt	6799d 22h	/.
27	xilinx coregen	fisher5090	6810d 03h	/.
26	good edition	fisher5090	6810d 03h	/.
25	no message	fisher5090	6810d 03h	/.
24	First cut. One of the main culprits for the timing violations.	godzilla	6812d 18h	/.
23	First cut. Original code from Easic but add some extra controls. One of the main culprits for the timing violations.	godzilla	6812d 18h	/.
22	First cut. Original code from Easic but add some extra controls.	godzilla	6812d 18h	/.
21	First cut. Not thoroughly tested yet but still need to implement the configuration, non-crc version and stats. So far Leonardo Precison indicates the design can run upto 101 MHz but need to remove the timing violations to increase speed.	godzilla	6812d 18h	/.