URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [.] - Rev 204

Rev	Log message	Author	Age	Path
204	Added function prototypes to stop gcc from complaining	erez	8330d 23h	/.
203	Updated from xess branch.	lampret	8332d 13h	/.
202	changed configure.in and acconfig.h to check for long long reran autoheader & autoconf	erez	8337d 20h	/.
201	readfunc() and writefunc() now use unsigned long values instead of unsigned char.	erez	8337d 20h	/.
200	Initial import	simons	8341d 03h	/.
199	Initial import	simons	8341d 05h	/.
198	Moved from testbench.old	simons	8343d 16h	/.
197	This is not used any more.	simons	8343d 16h	/.
196	Configuration SPRs added.	simons	8343d 16h	/.
195	New test added.	simons	8343d 16h	/.
194	Fixed a bug for little endian architectures. Could cause a hang of gdb under some circumstances.	chris	8344d 00h	/.
193	Declared RISCOP.RESET to be volatile so that -O2 optimization would not optimize away the correct behavior by trying to be too clever.	chris	8344d 00h	/.
192	Removed GlobalMode reference causing problems for --disable-debugmod option.	chris	8344d 09h	/.
191	Added UART jitter var to sim config	chris	8345d 06h	/.
190	Added jitter initialization	chris	8345d 06h	/.
189	fixed mode handling for tick facility	chris	8345d 06h	/.
188	fixed PIC interrupt controller	chris	8345d 06h	/.
187	minor change to clear pending exception	chris	8345d 06h	/.
186	major change to UART structure	chris	8345d 06h	/.
185	major change to UART code	chris	8345d 06h	/.