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Rev Log message Author Age Path
35 Prevent jumping/branching when stalling skordal 3322d 13h /.
34 Prevent flushing the pipeline if it is stalling skordal 3322d 13h /.
33 Ensure correct read of CSR after stall skordal 3322d 13h /.
32 Prevent jumping/branching when stalling skordal 3325d 10h /.
31 Prevent flushing the pipeline if it is stalling skordal 3325d 11h /.
30 Add testcase for a combination of instructions that fail when using cache skordal 3327d 16h /.
29 Add reset functionality for the WB arbiter state machine skordal 3330d 11h /.
28 Add rudimentary User's manual skordal 3336d 10h /.
27 Prevent exceptions from being taken while stalling skordal 3336d 12h /.
26 Prevent exceptions from being taken while stalling

Jumping to an exception handler while stalling and waiting for a load/store
instruction to finish can cause undefined results from the load/store
instruction. This actually fixes the issue mentioned in revision r20.		 skordal 3336d 15h /.
25 Add placeholder cache modules and a wishbone arbiter skordal 3338d 20h /.
24 Remove unused STRINGIFY macros skordal 3339d 09h /.
23 Create branch to use for implementing a cache skordal 3339d 09h /.
22 Fix the potato_get_badvaddr() macro skordal 3339d 09h /.
21 Upgrade the example design to use a 60 MHz system clock skordal 3339d 10h /.
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3339d 10h /.
19 SHA256 benchmark: allow compiler to inline at will skordal 3339d 10h /.
18 instr_misalign_check: add do_jump to sensitivity list skordal 3341d 10h /.
17 Improve detection of unaligned instructions skordal 3345d 17h /.
16 Correct grammar in source code comment skordal 3345d 17h /.

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