URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [.] - Rev 211

Rev	Log message	Author	Age	Path
211	wire signals for P2 low impedance marker issue	arniml	6860d 13h	/.
210	entity changes for P2 low impedance marker issue	arniml	6860d 13h	/.
209	entity changes for P2 low impedance issue	arniml	6860d 13h	/.
208	wire signals for P2 low impeddance marker issue	arniml	6860d 13h	/.
207	entity changes for P2 low impedance trigger issue	arniml	6860d 13h	/.
206	* change low impedance markers for P2 separate marker for low and high part * p2_o output is also registered to prevent combinational output to pads	arniml	6860d 13h	/.
205	operate ale_q and int_q with xtal_i after shift of ALE assertion to XTAL3	arniml	6860d 13h	/.
204	* suppress p2_output_pch_o when p2_output_exp is active * wire xtal_i to interrupt module	arniml	6860d 13h	/.
203	* shift assertion of ALE and PROG to xtal3 * correct change of revision 1.8	arniml	6860d 13h	/.
202	fix address assignment	arniml	6860d 13h	/.
201	split low impedance markers for P2	arniml	6860d 13h	/.
200	add check for tCP: Port Control Setup to PROG'	arniml	6860d 13h	/.
199	initial check-in	arniml	6860d 13h	/.
198	fix package dependencies	arniml	6860d 18h	/.
197	preliminary version 0.3	arniml	6861d 21h	/.
196	update to version 0.3	arniml	6861d 21h	/.
195	Suppress assertion of bus_read_bus_s when interrupt is pending. This should fix bug report "PROBLEM WHEN INT AND JMP"	arniml	6862d 00h	/.
194	initial check-in	arniml	6862d 00h	/.
193	iManual	arniml	6877d 02h	/.
192	update list for Wishbone toplevel	arniml	6877d 13h	/.