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Rev Log message Author Age Path
287 add notes on FPGA implementation arniml 5948d 00h /.
286 hierarchy update, RAM and ROM clarification arniml 5948d 00h /.
285 generate D for synchronous implementation in clocked process arniml 5949d 01h /.
284 better support for ISE/XST:
opc_table and opc_decoder merged into decoder_pack and decoder
arniml 5949d 01h /.
283 update to new mnemonic decoder arniml 5949d 01h /.
282 decouple bidir port T0 from P1
fixes testcase black_box/tx/t0
arniml 5950d 00h /.
281 clarify testcase compilation arniml 5950d 00h /.
280 added syn directory structure arniml 5951d 00h /.
279 update arniml 5965d 23h /.
278 initial check-in arniml 5966d 01h /.
277 This commit was manufactured by cvs2svn to create tag 'rel_1_0'. 6446d 23h /.
276 add change notes for release 1.0 arniml 6446d 23h /.
275 fix sensitivity list arniml 6447d 21h /.
274 revision 1.0 arniml 6447d 21h /.
273 reset counter_q arniml 6465d 08h /.
272 fix entity port names arniml 6469d 09h /.
271 initial check-in arniml 6469d 09h /.
270 fix component name arniml 6469d 10h /.
269 update list for inclusion of t8243 testbenches arniml 6596d 23h /.
268 io expander not suitable for dump compare arniml 6601d 23h /.

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