URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [MC6809_cpu.v] - Rev 18

Rev	Log message	Author	Age	Path
18	fixed interrupt handling	ale500	3417d 03h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
17	Bugfixes	ale500	3506d 01h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
16	Fix ABX, TST, implemented new decoder, removed unused logic	ale500	3594d 00h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
14	Improved speed and reduced decoder complexity	ale500	3604d 05h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
12	Fixed inc, dec, indirect indexed, mul, shifts, h flag	ale500	3618d 05h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
11	Fixed inc, dec, clr direct, ext and ind, deca, decb	ale500	3622d 00h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
10	Fixed several extended and indirect opcodes	ale500	3625d 05h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
9	Implemented E flag, some minor optimizations	ale500	3799d 05h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
7	Added SYNC, Fixed EXG	ale500	3800d 04h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
6	Implemented CWAI. Minor optimizations	ale500	3804d 01h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
5	EXG/TFR Implemented	ale500	3804d 22h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
4	Bugfix and enhancements	ale500	3806d 03h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v
2	Initial version	ale500	3808d 01h	/6809_6309_compatible_core/trunk/rtl/verilog/MC6809_cpu.v