URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1] - Rev 99

Rev	Log message	Author	Age	Path
99	change directory structure	simont	7805d 15h	/8051/tags/rel_1
98	move to rtl/verilog	simont	7805d 15h	/8051/tags/rel_1
97	initial inport	simont	7805d 15h	/8051/tags/rel_1
96	initial import	simont	7805d 15h	/8051/tags/rel_1
95	updating...	simont	7805d 15h	/8051/tags/rel_1
94	fix bug.	simont	7805d 15h	/8051/tags/rel_1
93	OC8051_XILINX_RAM added	simont	7805d 15h	/8051/tags/rel_1
92	initial inport	simont	7805d 15h	/8051/tags/rel_1
91	* empty log message *	simont	7805d 15h	/8051/tags/rel_1
90	change module name.	simont	7810d 09h	/8051/tags/rel_1
89	Replaced oc8051_ram by generic_dpram.	rherveille	7871d 12h	/8051/tags/rel_1
88	fix bugs	simont	7876d 13h	/8051/tags/rel_1
87	add include oc8051_defines.v	simont	7876d 13h	/8051/tags/rel_1
86	initial input	simont	7876d 13h	/8051/tags/rel_1
85	prepare bugs	simont	7876d 13h	/8051/tags/rel_1
84	remove wb_bus_mon	simont	7884d 12h	/8051/tags/rel_1
83	replace some modules	simont	7884d 12h	/8051/tags/rel_1
82	replace some modules	simont	7884d 12h	/8051/tags/rel_1
81	initial import	simont	7884d 12h	/8051/tags/rel_1
80	removing unused modules	simont	7884d 13h	/8051/tags/rel_1