URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_comp.v] - Rev 16

Rev	Log message	Author	Age	Path
16	inputs ram and op2 removed	simont	8004d 22h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
10	% replaced with ^ in uart; some minor improvements	markom	8006d 02h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
9	removed unused compare states	markom	8007d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
2	Initial CVS import	simont	8023d 22h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v