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[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_comp.v] - Rev 185

Rev	Log message	Author	Age	Path
185		root	5602d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
182	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7681d 11h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
179	add /* synopsys xx_case */ to case statments.	simont	7681d 12h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
132	change branch instruction execution (reduse needed clock periods).	simont	7748d 16h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
95	updating...	simont	7771d 21h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
46	prepared header	simont	7955d 15h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
16	inputs ram and op2 removed	simont	7999d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
10	% replaced with ^ in uart; some minor improvements	markom	8000d 23h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
9	removed unused compare states	markom	8002d 16h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v
2	Initial CVS import	simont	8018d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_comp.v