URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_int.v] - Rev 179

Rev	Log message	Author	Age	Path
179	add /* synopsys xx_case */ to case statments.	simont	7709d 01h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
150	fix some bugs.	simont	7737d 04h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
116	change sfr's interface.	simont	7794d 07h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
90	change module name.	simont	7804d 04h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
82	replace some modules	simont	7878d 07h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
46	prepared header	simont	7983d 04h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
22	fix some bugs	simont	8023d 02h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
17	fix some bugs	simont	8027d 08h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
4	Code repaired to satisfy the linter; testbech fails	markom	8030d 10h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v
2	Initial CVS import	simont	8046d 08h	/8051/tags/rel_12/rtl/verilog/oc8051_int.v