URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_uart.v] - Rev 30

Rev	Log message	Author	Age	Path
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7993d 20h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
17	fix some bugs	simont	7999d 18h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
10	% replaced with ^ in uart; some minor improvements	markom	8000d 23h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
8	some IDS optimizations	markom	8002d 16h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
5	more linter corrections; 2 tests still fail	markom	8002d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
4	Code repaired to satisfy the linter; testbech fails	markom	8002d 21h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v
2	Initial CVS import	simont	8018d 19h	/8051/tags/rel_12/rtl/verilog/oc8051_uart.v