URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5568d 10h	/8051/tags/rel_12/rtl
185		root	5624d 11h	/8051/tags/rel_12/rtl
182	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7703d 03h	/8051/tags/rel_12/rtl
181	Simulation reports added.	simont	7703d 03h	/8051/tags/rel_12/rtl
179	add /* synopsys xx_case */ to case statments.	simont	7703d 04h	/8051/tags/rel_12/rtl
178	x replaced with 0.	simont	7703d 06h	/8051/tags/rel_12/rtl
177	Fix bug in case of writing and reading from same address.	simont	7714d 10h	/8051/tags/rel_12/rtl
175	initial inport.	simont	7714d 11h	/8051/tags/rel_12/rtl
174	ram modules added.	simont	7714d 11h	/8051/tags/rel_12/rtl
173	simualtion `ifdef added	simont	7714d 11h	/8051/tags/rel_12/rtl
172	BIST signals added.	simont	7717d 11h	/8051/tags/rel_12/rtl
171	fix bug in DA operation.	simont	7725d 08h	/8051/tags/rel_12/rtl
158	fix bug.	simont	7729d 14h	/8051/tags/rel_12/rtl
153	`ifdef added.	simont	7731d 08h	/8051/tags/rel_12/rtl
152	sub_result output added.	simont	7731d 08h	/8051/tags/rel_12/rtl
151	remove pc_r register.	simont	7731d 08h	/8051/tags/rel_12/rtl
150	fix some bugs.	simont	7731d 08h	/8051/tags/rel_12/rtl
149	pipelined acces to axternal instruction interface added.	simont	7731d 08h	/8051/tags/rel_12/rtl
148	include "8051_defines" added.	simont	7731d 08h	/8051/tags/rel_12/rtl
146	fix bug in movc intruction.	simont	7753d 09h	/8051/tags/rel_12/rtl