URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl] - Rev 73

Rev	Log message	Author	Age	Path
73	initial import	simont	7950d 22h	/8051/tags/rel_12/rtl
72	fix bug in interface to external data ram	simont	7950d 23h	/8051/tags/rel_12/rtl
67	add parameters for instruction cache	simont	7955d 01h	/8051/tags/rel_12/rtl
62	fix bugs in instruction interface	simont	7955d 21h	/8051/tags/rel_12/rtl
54	cahnge interface to instruction rom	simont	7961d 20h	/8051/tags/rel_12/rtl
47	remove unused files	simont	7978d 21h	/8051/tags/rel_12/rtl
46	prepared header	simont	7978d 21h	/8051/tags/rel_12/rtl
45	prepared header	simont	7978d 21h	/8051/tags/rel_12/rtl
44	prepared header	simont	7978d 22h	/8051/tags/rel_12/rtl
41	remove unused files	simont	7978d 23h	/8051/tags/rel_12/rtl
40	added sigals for interacting with external ram	simont	7999d 01h	/8051/tags/rel_12/rtl
38	fix some bugs	simont	8005d 23h	/8051/tags/rel_12/rtl
37	added signals ack, stb and cyc	simont	8005d 23h	/8051/tags/rel_12/rtl
36	fix bugs in mode 0	simont	8005d 23h	/8051/tags/rel_12/rtl
32	overflow repaired	simont	8007d 04h	/8051/tags/rel_12/rtl
31	fix some bugs	simont	8013d 20h	/8051/tags/rel_12/rtl
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	8017d 02h	/8051/tags/rel_12/rtl
29	fix some bugs	simont	8017d 03h	/8051/tags/rel_12/rtl
28	remove syn signal	simont	8017d 03h	/8051/tags/rel_12/rtl
27	fix some bugs	simont	8017d 03h	/8051/tags/rel_12/rtl