URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] - Rev 40

Rev	Log message	Author	Age	Path
40	added sigals for interacting with external ram	simont	7978d 15h	/8051/tags/rel_2/rtl
38	fix some bugs	simont	7985d 13h	/8051/tags/rel_2/rtl
37	added signals ack, stb and cyc	simont	7985d 14h	/8051/tags/rel_2/rtl
36	fix bugs in mode 0	simont	7985d 14h	/8051/tags/rel_2/rtl
32	overflow repaired	simont	7986d 18h	/8051/tags/rel_2/rtl
31	fix some bugs	simont	7993d 10h	/8051/tags/rel_2/rtl
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7996d 17h	/8051/tags/rel_2/rtl
29	fix some bugs	simont	7996d 17h	/8051/tags/rel_2/rtl
28	remove syn signal	simont	7996d 18h	/8051/tags/rel_2/rtl
27	fix some bugs	simont	7996d 18h	/8051/tags/rel_2/rtl
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7996d 19h	/8051/tags/rel_2/rtl
25	divider and multiplier pass test	markom	7997d 14h	/8051/tags/rel_2/rtl
23	mul & div use 4 clocks	simont	7998d 09h	/8051/tags/rel_2/rtl
22	fix some bugs	simont	7998d 09h	/8051/tags/rel_2/rtl
21	mul bug fixed	markom	7998d 15h	/8051/tags/rel_2/rtl
20	multiplier and divider changed so they complete in 4 cycles	markom	7998d 17h	/8051/tags/rel_2/rtl
19	combinatorial loop removed	simont	7999d 10h	/8051/tags/rel_2/rtl
17	fix some bugs	simont	8002d 15h	/8051/tags/rel_2/rtl
16	inputs ram and op2 removed	simont	8002d 15h	/8051/tags/rel_2/rtl
15	commbinatorial loop removed	simont	8002d 15h	/8051/tags/rel_2/rtl