URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl] - Rev 75

Rev	Log message	Author	Age	Path
75	initial import	simont	7922d 05h	/8051/tags/rel_2/rtl
73	initial import	simont	7930d 06h	/8051/tags/rel_2/rtl
72	fix bug in interface to external data ram	simont	7930d 07h	/8051/tags/rel_2/rtl
67	add parameters for instruction cache	simont	7934d 09h	/8051/tags/rel_2/rtl
62	fix bugs in instruction interface	simont	7935d 05h	/8051/tags/rel_2/rtl
54	cahnge interface to instruction rom	simont	7941d 03h	/8051/tags/rel_2/rtl
47	remove unused files	simont	7958d 05h	/8051/tags/rel_2/rtl
46	prepared header	simont	7958d 05h	/8051/tags/rel_2/rtl
45	prepared header	simont	7958d 05h	/8051/tags/rel_2/rtl
44	prepared header	simont	7958d 06h	/8051/tags/rel_2/rtl
41	remove unused files	simont	7958d 07h	/8051/tags/rel_2/rtl
40	added sigals for interacting with external ram	simont	7978d 09h	/8051/tags/rel_2/rtl
38	fix some bugs	simont	7985d 07h	/8051/tags/rel_2/rtl
37	added signals ack, stb and cyc	simont	7985d 07h	/8051/tags/rel_2/rtl
36	fix bugs in mode 0	simont	7985d 07h	/8051/tags/rel_2/rtl
32	overflow repaired	simont	7986d 11h	/8051/tags/rel_2/rtl
31	fix some bugs	simont	7993d 04h	/8051/tags/rel_2/rtl
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7996d 10h	/8051/tags/rel_2/rtl
29	fix some bugs	simont	7996d 11h	/8051/tags/rel_2/rtl
28	remove syn signal	simont	7996d 11h	/8051/tags/rel_2/rtl