URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2] - Rev 39

Rev	Log message	Author	Age	Path
39	added signals ack, stb and cyc	simont	7985d 05h	/8051/tags/rel_2
38	fix some bugs	simont	7985d 05h	/8051/tags/rel_2
37	added signals ack, stb and cyc	simont	7985d 05h	/8051/tags/rel_2
36	fix bugs in mode 0	simont	7985d 05h	/8051/tags/rel_2
35	design docunemt	simont	7986d 03h	/8051/tags/rel_2
34	specification docunemt	simont	7986d 03h	/8051/tags/rel_2
33	fix some bugs	simont	7986d 09h	/8051/tags/rel_2
32	overflow repaired	simont	7986d 09h	/8051/tags/rel_2
31	fix some bugs	simont	7993d 02h	/8051/tags/rel_2
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7996d 08h	/8051/tags/rel_2
29	fix some bugs	simont	7996d 09h	/8051/tags/rel_2
28	remove syn signal	simont	7996d 09h	/8051/tags/rel_2
27	fix some bugs	simont	7996d 09h	/8051/tags/rel_2
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7996d 11h	/8051/tags/rel_2
25	divider and multiplier pass test	markom	7997d 05h	/8051/tags/rel_2
24	intensively tests all instructions	markom	7997d 10h	/8051/tags/rel_2
23	mul & div use 4 clocks	simont	7998d 01h	/8051/tags/rel_2
22	fix some bugs	simont	7998d 01h	/8051/tags/rel_2
21	mul bug fixed	markom	7998d 06h	/8051/tags/rel_2
20	multiplier and divider changed so they complete in 4 cycles	markom	7998d 08h	/8051/tags/rel_2