URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk] - Rev 140

Rev	Log message	Author	Age	Path
140	cahnge assigment to pc_wait (remove istb_o)	simont	7743d 08h	/8051/trunk
139	add aditional alu destination to solve critical path.	simont	7744d 02h	/8051/trunk
138	Change buffering to save one clock per instruction.	simont	7744d 02h	/8051/trunk
137	change to fit xrom.	simont	7744d 07h	/8051/trunk
136	registering outputs.	simont	7744d 07h	/8051/trunk
135	prepared start of receiving if ren is not active.	simont	7750d 06h	/8051/trunk
134	fix bug in case execution of two data dependent instructions.	simont	7750d 06h	/8051/trunk
133	fix bug in substraction.	simont	7750d 09h	/8051/trunk
132	change branch instruction execution (reduse needed clock periods).	simont	7754d 00h	/8051/trunk
131	prepare programs for new timing.	simont	7754d 00h	/8051/trunk
130	prepared programs for new timing.	simont	7754d 00h	/8051/trunk
129	updated...	simont	7754d 00h	/8051/trunk
128	chance idat_ir to 24 bit wide	simont	7763d 08h	/8051/trunk
127	fix bug (cyc_o and stb_o)	simont	7763d 08h	/8051/trunk
126	define OC8051_XILINX_RAMB added	simont	7763d 08h	/8051/trunk
125	update, add prescaler, rclk, tclk.	simont	7763d 08h	/8051/trunk
124	add support for external rom from xilinx ramb4	simont	7763d 08h	/8051/trunk
123	fiz bug iv pcs operation.	simont	7765d 03h	/8051/trunk
122	deifne OC8051_ROM added	simont	7768d 08h	/8051/trunk
121	Change pc add value from 23'h to 16'h	simont	7768d 08h	/8051/trunk