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[/] [aemb/] [branches/] [AEMB2_712/] [rtl/] [verilog/] [aeMB_ibuf.v] - Rev 191

Rev	Log message	Author	Age	Path
191	New directory structure.	root	5626d 23h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
77	This commit was manufactured by cvs2svn to create branch 'AEMB2_712'.		6084d 23h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
70	Change interrupt to positive level triggered interrupts.	sybreon	6100d 03h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
63	Fixed interrupt signal synchronisation.	sybreon	6107d 18h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
61	Changed interrupt handling system (reported by M. Ettus).	sybreon	6107d 20h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
55	Upgraded license to LGPLv3. Significant performance optimisations.	sybreon	6112d 01h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
45	Minor code cleanup.	sybreon	6119d 09h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
44	Added better (beta) interrupt support. Changed MSR_IE to disabled at reset as per MB docs.	sybreon	6119d 23h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v
41	New EDK 3.2 compatible design with optional barrel-shifter and multiplier. Fixed various minor data hazard bugs. Code compatible with -O0/1/2/3/s generated code.	sybreon	6120d 15h	/aemb/branches/AEMB2_712/rtl/verilog/aeMB_ibuf.v