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Subversion Repositories amber

[/] [amber] - Rev 24

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Rev	Log message	Author	Age	Path
24	Added instructions how to build Linux kernel from source files	csantifort	4882d 04h	/amber
23	Split the source files list into a Vertex-6 only list and a Spartan-6 only list. That way users don;t need to delete files from the list manually if they only have a setup for one of the FPGA types.	csantifort	4882d 05h	/amber
22	Added files and instructions to enable the building of the vmlinux image from the kernel source files.	csantifort	4886d 04h	/amber
21	Fixed bug in the conditions to create the FPGA configuration log file. I added the creation of the log file in the last release, but the way it was implemented was causing the Makefile to always rebuild from the start.	csantifort	4886d 04h	/amber
20	Added feature to A25 core to directly use a read value from the write back stage to reduce the stall to 1 cycle when there is a register conflict with the following instruction. This increases performance by about 3%.	csantifort	4907d 05h	/amber
19	Create a configuration log file as part of the synthesis flow. This file is a useful reference to tell the different bitfiles apart.	csantifort	4907d 05h	/amber
18	Added list of source files and diagram for Amber25 core.	csantifort	4910d 04h	/amber
17	amber25 core bug fix. The return address for irq interrupts was off by 4 bytes when the interrupt occurred during a stm instruction with the following instruction having some register conflicts. Added test irq_stm to catch the bug. Cleaned up some header descriptions	csantifort	4911d 03h	/amber
16	Deleted the old version of the 3-state amber core. Its replaced with amber23. Added the 5-state Amber core.	csantifort	4913d 17h	/amber
15	Copied amber to amber23, Many system changes to support new amber25 core.	csantifort	4913d 17h	/amber
14	Re-wrote the behavioral clock generation code to more accurately calculate the sys_clk frequency. The previous version was not producing the correct frequency at higher frequenies due to rounding errors.	csantifort	4915d 05h	/amber
13	Bug fix - added an extra state to the rx state machine to properly align reading the uart input to the middle of each bit.	csantifort	4915d 05h	/amber
12	Added INITIALIZE_TO_ZERO parameter to keep instantiation idendical to generic sram models. The parameter is not used in the Xilinx models (they always init to zero) but it used in the generic models.	csantifort	4915d 06h	/amber
11	Added vmlinux test.	csantifort	4930d 06h	/amber
10	Removed parameters for unused peruipheral modules	csantifort	4931d 09h	/amber
9	Change the format of mcr and mrc listings so they exactly match the dissasembly produced by the gnu tools. Write ip instead of r12 in listings.	csantifort	4931d 09h	/amber
8	Change the value in the ID register to be compatible with the Linux code that parses it and picks a processor type.	csantifort	4931d 09h	/amber
7	Added instructions to use Veritak simulator. Removed some unused functions from memory_configuration.v.	csantifort	4940d 00h	/amber
6	Set ignore property for output files	csantifort	4943d 03h	/amber
5	Deleted two temporary files that should not be in the release.	csantifort	4943d 23h	/amber

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[/] [amber] - Rev 24

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