URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [branches/] [clos_opt/] [clos_opt/] [src] - Rev 78

Rev	Log message	Author	Age	Path
78	pass link	wsong0210	4730d 15h	/async_sdm_noc/branches/clos_opt/clos_opt/src
77	pass syn elaboration	wsong0210	4731d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
75	code finished, start the debugging	wsong0210	4735d 15h	/async_sdm_noc/branches/clos_opt/clos_opt/src
74	in/out buffer finished	wsong0210	4736d 15h	/async_sdm_noc/branches/clos_opt/clos_opt/src
73	input buffer	wsong0210	4743d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4744d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
71	the buffered 2-stage Clos switch	wsong0210	4745d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
70	clos-opt ongoing	wsong0210	4745d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
69	central module of the Clos	wsong0210	4748d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4749d 14h	/async_sdm_noc/branches/clos_opt/clos_opt/src
60	try to make the address comparison relaxed QDI	wsong0210	4773d 15h	/async_sdm_noc/branches/clos_opt/clos_opt/src