URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] [branches/] [clos_opt/] [clos_opt] - Rev 78

Rev	Log message	Author	Age	Path
78	pass link	wsong0210	4817d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
77	pass syn elaboration	wsong0210	4818d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
76	fix syntex	wsong0210	4822d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
75	code finished, start the debugging	wsong0210	4822d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
74	in/out buffer finished	wsong0210	4823d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
73	input buffer	wsong0210	4830d 09h	/async_sdm_noc/branches/clos_opt/clos_opt
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4831d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
71	the buffered 2-stage Clos switch	wsong0210	4832d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
70	clos-opt ongoing	wsong0210	4832d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
69	central module of the Clos	wsong0210	4835d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4836d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
62	clos opt ongoing	wsong0210	4852d 10h	/async_sdm_noc/branches/clos_opt/clos_opt
61	settle down the pipeline controller	wsong0210	4857d 09h	/async_sdm_noc/branches/clos_opt/clos_opt
60	try to make the address comparison relaxed QDI	wsong0210	4860d 10h	/async_sdm_noc/branches/clos_opt/clos_opt