URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc] - Rev 81

Rev	Log message	Author	Age	Path
81	adding a solution in README to a cell lib problem.	wsong0210	4479d 15h	/async_sdm_noc
80	make the README file more understandable	wsong0210	4559d 12h	/async_sdm_noc
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4619d 22h	/async_sdm_noc
78	pass link	wsong0210	4786d 09h	/async_sdm_noc
77	pass syn elaboration	wsong0210	4787d 09h	/async_sdm_noc
76	fix syntex	wsong0210	4791d 09h	/async_sdm_noc
75	code finished, start the debugging	wsong0210	4791d 10h	/async_sdm_noc
74	in/out buffer finished	wsong0210	4792d 09h	/async_sdm_noc
73	input buffer	wsong0210	4799d 09h	/async_sdm_noc
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4800d 09h	/async_sdm_noc
71	the buffered 2-stage Clos switch	wsong0210	4801d 09h	/async_sdm_noc
70	clos-opt ongoing	wsong0210	4801d 09h	/async_sdm_noc
69	central module of the Clos	wsong0210	4804d 09h	/async_sdm_noc
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4805d 09h	/async_sdm_noc
67	structure not good, prepare to use new files	wsong0210	4805d 11h	/async_sdm_noc
66	clos opt ongoing	wsong0210	4820d 03h	/async_sdm_noc
65	pipeline controller	wsong0210	4820d 04h	/async_sdm_noc
64	clos opt ongoing	wsong0210	4820d 04h	/async_sdm_noc
63	clos opt ongoing	wsong0210	4820d 08h	/async_sdm_noc
62	clos opt ongoing	wsong0210	4821d 09h	/async_sdm_noc