OpenCores
URL https://opencores.org/ocsvn/atlas_core/atlas_core/trunk

Subversion Repositories atlas_core

[/] [atlas_core/] [trunk] - Rev 17

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
17 - new interrupt vector: unique vector for undefined instructions / access violations ("command error trap")
- bug fix in assembler: correct absolute address generator - assembler works fine now ;)		 zero_gravity 4078d 02h /atlas_core/trunk
16 - assembler update: assembler can now include other files using the ".include" statement
- doc update: fixed error in instruction summary table		 zero_gravity 4090d 04h /atlas_core/trunk
15 - new instruction added: NEG Rd, Rx (Rd <- 0 - Ra)
- instruction is built from redundant SUB with identical operands (SUB Rd, Ra, Ra; will always result in 0)
- since there are other instructions to clear a register, the redundant SUB has been recoded to perform the NEG operation
- NEG operation added to documentary and assembler		 zero_gravity 4097d 05h /atlas_core/trunk
14 - instruction set summary card added to documentary (Atlas Processor Datasheet)
- minor edits in SYS_REG.vhd and ATLAS_pkg.vhd files		 zero_gravity 4098d 01h /atlas_core/trunk
13 - new option added to the RT/GT/STPC instructions
- ATLAS_MICRO implementation scheme added (+testbench)
- huge DOC update		 zero_gravity 4112d 21h /atlas_core/trunk
12 - assembler: dev c++ project changed to 32-bit
- atlas_asm.exe is now compiled for 32-bit system		 zero_gravity 4135d 03h /atlas_core/trunk
11 - optimized memory components
-> less access hardware
-> easier mapping for quartus sythesis tool		 zero_gravity 4137d 21h /atlas_core/trunk
10 - optimized opcode decoder
- deleted HALT signal from Atlas Micro - not feasible here
- doc update		 zero_gravity 4137d 22h /atlas_core/trunk
9 - ATLAS_MICRO implementation example added to project (CPU + I/D memory) zero_gravity 4138d 23h /atlas_core/trunk
8 - bug-fix: MSR read access
- new instruction added: SPR (store parity of register to T-flag)
- doc update
- assembler update		 zero_gravity 4139d 00h /atlas_core/trunk
7 - data path diagram added to documentary (finally!!)
- updated assembler version
- updated assembler examples		 zero_gravity 4142d 01h /atlas_core/trunk
6 - more code examples added to documentary
- minor updates for RTL files
- assembler now supports binary and hexadecimal number representation		 zero_gravity 4145d 00h /atlas_core/trunk
5 - error corrected in data sheet's branch table asm example zero_gravity 4150d 04h /atlas_core/trunk
4 - complete update zero_gravity 4150d 04h /atlas_core/trunk
3 - bug-fix of compare/test instruction in assembler program
- minor edits in rtl files to make a more efficient use of config constants		 zero_gravity 4151d 21h /atlas_core/trunk
2 initial repository setup zero_gravity 4152d 23h /atlas_core/trunk
1 The project and the structure was created root 4152d 23h /atlas_core/trunk

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.