URL https://opencores.org/ocsvn/can/can/trunk

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[/] [can/] [tags/] [rel_10/] [rtl/] [verilog/] [can_btl.v] - Rev 75

Rev	Log message	Author	Age	Path
75	When switching to tx, sync stage is overjumped.	mohor	7707d 10h	/can/tags/rel_10/rtl/verilog/can_btl.v
35	Several registers added. Not finished, yet.	mohor	7824d 04h	/can/tags/rel_10/rtl/verilog/can_btl.v
29	Overload fixed. Hard synchronization also enabled at the last bit of interframe.	mohor	7829d 06h	/can/tags/rel_10/rtl/verilog/can_btl.v
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7829d 22h	/can/tags/rel_10/rtl/verilog/can_btl.v
24	backup.	mohor	7838d 23h	/can/tags/rel_10/rtl/verilog/can_btl.v
15	Temporary version (backup).	mohor	7859d 07h	/can/tags/rel_10/rtl/verilog/can_btl.v
11	Acceptance filter added.	mohor	7861d 22h	/can/tags/rel_10/rtl/verilog/can_btl.v
10	Backup version.	mohor	7872d 20h	/can/tags/rel_10/rtl/verilog/can_btl.v
9	Header changed, testbench improved to send a frame (crc still missing).	mohor	7874d 00h	/can/tags/rel_10/rtl/verilog/can_btl.v
7	Tripple sampling supported.	mohor	7874d 23h	/can/tags/rel_10/rtl/verilog/can_btl.v
6	Commented lines removed.	mohor	7875d 01h	/can/tags/rel_10/rtl/verilog/can_btl.v
5	Synchronization working.	mohor	7875d 10h	/can/tags/rel_10/rtl/verilog/can_btl.v
2	Initial	mohor	7880d 08h	/can/tags/rel_10/rtl/verilog/can_btl.v