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[/] [can/] [tags/] [rel_11/] [rtl/] [verilog/] [can_bsp.v] - Rev 36

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Rev	Log message	Author	Age	Path
36	Most of the registers added. Registers "arbitration lost capture", "error code capture" + few more still need to be added.	mohor	7820d 18h	/can/tags/rel_11/rtl/verilog/can_bsp.v
35	Several registers added. Not finished, yet.	mohor	7823d 22h	/can/tags/rel_11/rtl/verilog/can_bsp.v
32	abort_tx added. Bit destuff fixed.	mohor	7826d 04h	/can/tags/rel_11/rtl/verilog/can_bsp.v
31	Wishbone interface added.	mohor	7827d 17h	/can/tags/rel_11/rtl/verilog/can_bsp.v
30	CAN is working according to the specification. WB interface and more registers (status, IRQ, ...) needs to be added.	mohor	7828d 02h	/can/tags/rel_11/rtl/verilog/can_bsp.v
29	Overload fixed. Hard synchronization also enabled at the last bit of interframe.	mohor	7829d 00h	/can/tags/rel_11/rtl/verilog/can_bsp.v
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7829d 16h	/can/tags/rel_11/rtl/verilog/can_bsp.v
26	Backup.	mohor	7834d 01h	/can/tags/rel_11/rtl/verilog/can_bsp.v
25	* empty log message *	mohor	7834d 04h	/can/tags/rel_11/rtl/verilog/can_bsp.v
24	backup.	mohor	7838d 17h	/can/tags/rel_11/rtl/verilog/can_bsp.v
22	Form error supported. When receiving messages, last bit of the end-of-frame does not generate form error. Receiver goes to the idle mode one bit sooner. (CAN specification ver 2.0, part B, page 57).	mohor	7853d 05h	/can/tags/rel_11/rtl/verilog/can_bsp.v
21	Data is stored to fifo at the end of ack stage.	mohor	7853d 20h	/can/tags/rel_11/rtl/verilog/can_bsp.v
20	CRC checking fixed (when bitstuff occurs at the end of a CRC sequence).	mohor	7853d 21h	/can/tags/rel_11/rtl/verilog/can_bsp.v
19	RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received.	mohor	7854d 04h	/can/tags/rel_11/rtl/verilog/can_bsp.v
18	When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo.	mohor	7854d 05h	/can/tags/rel_11/rtl/verilog/can_bsp.v
16	rx_fifo is now working.	mohor	7855d 06h	/can/tags/rel_11/rtl/verilog/can_bsp.v
15	Temporary version (backup).	mohor	7859d 01h	/can/tags/rel_11/rtl/verilog/can_bsp.v
14	rx fifo added. Not 100 % verified, yet.	mohor	7859d 20h	/can/tags/rel_11/rtl/verilog/can_bsp.v
13	Temporary files (backup).	mohor	7860d 04h	/can/tags/rel_11/rtl/verilog/can_bsp.v
12	Temp version.	mohor	7861d 05h	/can/tags/rel_11/rtl/verilog/can_bsp.v

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[/] [can/] [tags/] [rel_11/] [rtl/] [verilog/] [can_bsp.v] - Rev 36

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