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[/] [can/] [tags/] [rel_22/] - Rev 161

Rev	Log message	Author	Age	Path
161	New directory structure.	root	5647d 01h	/can/tags/rel_22
146	This commit was manufactured by cvs2svn to create tag 'rel_22'.		7243d 14h	/tags/rel_22
145	Arbitration bug fixed.	igorm	7243d 14h	/trunk
143	Bit acceptance_filter_mode was inverted.	igorm	7390d 06h	/trunk
141	Core improved to pass all tests with the Bosch VHDL Reference system.	igorm	7409d 05h	/trunk
140	I forgot to thange one signal name.	igorm	7464d 03h	/trunk
139	Signal bus_off_on added.	igorm	7464d 04h	/trunk
138	Header changed. Address latched to posedge. bus_off_on signal added.	mohor	7503d 06h	/trunk
137	Header changed.	mohor	7503d 06h	/trunk
136	Error counters changed.	mohor	7503d 06h	/trunk
135	Header changed.	mohor	7503d 07h	/trunk
134	Active high/low problem when Altera devices are used. Bug fixed by Rojhalat Ibrahim.	mohor	7611d 04h	/trunk
130	mbist signals updated according to newest convention	markom	7617d 15h	/trunk
129	Error counters changed.	mohor	7634d 00h	/trunk
127	Fixing the core to be Bosch VHDL Reference compatible.	mohor	7634d 00h	/trunk
126	Error counters fixed to be compatible with Bosch VHDL reference model. Small synchronization changes.	mohor	7634d 20h	/trunk
125	Synchronization changed, error counters fixed.	mohor	7639d 02h	/trunk
124	ALTERA_RAM supported.	mohor	7659d 08h	/trunk
121	When detecting bus-free, signal bus_free_cnt_en was cleared to zero although the last sampled bit was zero instead of one.	mohor	7666d 14h	/trunk
119	Artisan RAMs added.	mohor	7675d 11h	/trunk