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[/] [can/] [tags/] [rel_22/] [rtl/] [verilog/] [can_top.v] - Rev 81

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81 "chip select" signal cs_can_i is used only when not using WISHBONE
interface.
mohor 7715d 18h /can/tags/rel_22/rtl/verilog/can_top.v
78 tx_point generated one clk earlier. rx_i registered. Data corrected when
using extended mode.
mohor 7716d 18h /can/tags/rel_22/rtl/verilog/can_top.v
77 Synchronization is also needed when transmitting a message. mohor 7719d 17h /can/tags/rel_22/rtl/verilog/can_top.v
75 When switching to tx, sync stage is overjumped. mohor 7721d 18h /can/tags/rel_22/rtl/verilog/can_top.v
71 Ports added for the CAN_BIST. mohor 7723d 21h /can/tags/rel_22/rtl/verilog/can_top.v
67 CAN interrupt is active low. mohor 7798d 21h /can/tags/rel_22/rtl/verilog/can_top.v
66 unix. mohor 7804d 15h /can/tags/rel_22/rtl/verilog/can_top.v

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