URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] [can/] [tags/] [rel_22/] [rtl/] [verilog/] [can_top.v] - Rev 95

Rev	Log message	Author	Age	Path
95	Virtual silicon ram instances added.	simons	7681d 21h	/can/tags/rel_22/rtl/verilog/can_top.v
81	"chip select" signal cs_can_i is used only when not using WISHBONE interface.	mohor	7692d 03h	/can/tags/rel_22/rtl/verilog/can_top.v
78	tx_point generated one clk earlier. rx_i registered. Data corrected when using extended mode.	mohor	7693d 04h	/can/tags/rel_22/rtl/verilog/can_top.v
77	Synchronization is also needed when transmitting a message.	mohor	7696d 03h	/can/tags/rel_22/rtl/verilog/can_top.v
75	When switching to tx, sync stage is overjumped.	mohor	7698d 04h	/can/tags/rel_22/rtl/verilog/can_top.v
71	Ports added for the CAN_BIST.	mohor	7700d 06h	/can/tags/rel_22/rtl/verilog/can_top.v
67	CAN interrupt is active low.	mohor	7775d 07h	/can/tags/rel_22/rtl/verilog/can_top.v
66	unix.	mohor	7781d 01h	/can/tags/rel_22/rtl/verilog/can_top.v