OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] [can/] [tags/] [rel_22/] [sim/] [rtl_sim/] [run/] [wave.do] - Rev 161

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
161 New directory structure. root 5637d 15h /can/tags/rel_22/sim/rtl_sim/run/wave.do
146 This commit was manufactured by cvs2svn to create tag 'rel_22'. 7234d 05h /can/tags/rel_22/sim/rtl_sim/run/wave.do
127 Fixing the core to be Bosch VHDL Reference compatible. mohor 7624d 14h /can/tags/rel_22/sim/rtl_sim/run/wave.do
35 Several registers added. Not finished, yet. mohor 7852d 15h /can/tags/rel_22/sim/rtl_sim/run/wave.do
29 Overload fixed. Hard synchronization also enabled at the last bit of
interframe.		 mohor 7857d 17h /can/tags/rel_22/sim/rtl_sim/run/wave.do
28 Bosch license warning added. Error counters finished. Overload frames
still need to be fixed.		 mohor 7858d 09h /can/tags/rel_22/sim/rtl_sim/run/wave.do
25 *** empty log message *** mohor 7862d 21h /can/tags/rel_22/sim/rtl_sim/run/wave.do
24 backup. mohor 7867d 10h /can/tags/rel_22/sim/rtl_sim/run/wave.do
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7882d 22h /can/tags/rel_22/sim/rtl_sim/run/wave.do
16 rx_fifo is now working. mohor 7883d 23h /can/tags/rel_22/sim/rtl_sim/run/wave.do
14 rx fifo added. Not 100 % verified, yet. mohor 7888d 13h /can/tags/rel_22/sim/rtl_sim/run/wave.do
13 Temporary files (backup). mohor 7888d 20h /can/tags/rel_22/sim/rtl_sim/run/wave.do
11 Acceptance filter added. mohor 7890d 09h /can/tags/rel_22/sim/rtl_sim/run/wave.do
8 Testbench define file added. Clock divider register added. mohor 7902d 19h /can/tags/rel_22/sim/rtl_sim/run/wave.do
5 Synchronization working. mohor 7903d 21h /can/tags/rel_22/sim/rtl_sim/run/wave.do
2 Initial mohor 7908d 19h /can/tags/rel_22/sim/rtl_sim/run/wave.do

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.