URL https://opencores.org/ocsvn/can/can/trunk

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[/] [can/] [tags/] [rel_9/] [bench/] [verilog/] [can_testbench_defines.v] - Rev 16

Rev	Log message	Author	Age	Path
16	rx_fifo is now working.	mohor	7851d 12h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v
13	Temporary files (backup).	mohor	7856d 10h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v
11	Acceptance filter added.	mohor	7857d 22h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v
10	Backup version.	mohor	7868d 20h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v
9	Header changed, testbench improved to send a frame (crc still missing).	mohor	7870d 00h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v
8	Testbench define file added. Clock divider register added.	mohor	7870d 09h	/can/tags/rel_9/bench/verilog/can_testbench_defines.v