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Rev Log message Author Age Path
124 ALTERA_RAM supported. mohor 7615d 01h /can/trunk
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7622d 07h /can/trunk
119 Artisan RAMs added. mohor 7631d 04h /can/trunk
118 Artisan RAM fixed (when not using BIST). mohor 7631d 04h /can/trunk
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7631d 04h /can/trunk
115 Artisan ram instances added. simons 7636d 21h /can/trunk
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7663d 22h /can/trunk
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7665d 22h /can/trunk
110 Fixed according to the linter. mohor 7665d 22h /can/trunk
109 Fixed according to the linter. mohor 7666d 00h /can/trunk
108 Fixed according to the linter. mohor 7666d 00h /can/trunk
107 Fixed according to the linter. mohor 7666d 00h /can/trunk
106 Unused signal removed. mohor 7671d 22h /can/trunk
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7672d 12h /can/trunk
102 Little fixes (to fix warnings). mohor 7675d 02h /can/trunk
100 Synchronization changed. mohor 7679d 04h /can/trunk
99 PCI_BIST replaced with CAN_BIST. mohor 7679d 04h /can/trunk
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7684d 15h /can/trunk
95 Virtual silicon ram instances added. simons 7684d 17h /can/trunk
93 synthesis full_case parallel_case fixed. mohor 7690d 04h /can/trunk

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