OpenCores
URL https://opencores.org/ocsvn/cpu_lecture/cpu_lecture/trunk

Subversion Repositories cpu_lecture

[/] [cpu_lecture] - Rev 17

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
17 fixed missing carry flag for ROR instruction jsauermann 5245d 19h /cpu_lecture
16 fixed missing RD_M signal for IN instruction jsauermann 5254d 21h /cpu_lecture
15 fixed SP auto inc/dec problem jsauermann 5254d 23h /cpu_lecture
14 fixed wrong Q_RSEL for LDD instruction jsauermann 5256d 19h /cpu_lecture
13 fixed fault in LDD/STD decoding jsauermann 5257d 19h /cpu_lecture
12 fixed bug in decoding of I/O address for SP jsauermann 5258d 19h /cpu_lecture
11 fixed fault is BSET/BCLR instruction jsauermann 5260d 19h /cpu_lecture
10 wait decoder fault fixed jsauermann 5261d 01h /cpu_lecture
9 renamed 'main' to 'hello' in build commands jsauermann 5261d 21h /cpu_lecture
8 picture quality slightly improved jsauermann 5262d 02h /cpu_lecture
7 support multiple port sizes in make_mem jsauermann 5262d 03h /cpu_lecture
6 support multiple port sizes in make_mem jsauermann 5262d 03h /cpu_lecture
5 support multiple port sizes in make_mem jsauermann 5262d 03h /cpu_lecture
4 initial check-in jsauermann 5265d 23h /cpu_lecture
3 initial check-in jsauermann 5266d 04h /cpu_lecture
2 initial check-in jsauermann 5266d 21h /cpu_lecture
1 The project and the structure was created root 5266d 22h /cpu_lecture

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.