URL https://opencores.org/ocsvn/csa/csa/trunk

Subversion Repositories csa

[/] [csa/] [trunk] - Rev 36

Rev	Log message	Author	Age	Path
36	improve read_date vpi sytemcall, add offset and size argument	simon111	5564d 15h	/csa/trunk
35	csa cli support binary test data	simon111	5564d 19h	/csa/trunk
34	add binary test date (only sw_sim now )	simon111	5564d 22h	/csa/trunk
33	improve ledseg controler module	simon111	5565d 09h	/csa/trunk
32	fix a compile error	simon111	5565d 09h	/csa/trunk
31	remove pc execute file	simon111	5565d 10h	/csa/trunk
30	begin vailating on fpga	simon111	5565d 10h	/csa/trunk
29	fix some bugs	simon111	5566d 10h	/csa/trunk
28	create a quartus10 project for test the core	simon111	5566d 10h	/csa/trunk
27	improve makefiles	simon111	5566d 21h	/csa/trunk
24	New directory structure.	root	5603d 03h	/csa/trunk
23	testing key_schedule module	simon111	5686d 10h	/trunk
22	decrypt module testbench update	simon111	5726d 10h	/trunk
21	decrypt module passed basicly, it's not good code type	simon111	5726d 10h	/trunk
20	finished the stream_cypher module, this module passed modelsim , but doesn't pass veriwell, i don't know why	simon111	5740d 09h	/trunk
19	add a modelsim project to samulate the stream_cypher module	simon111	5740d 09h	/trunk
18	try to add decrypt module (not finished yet)	simon111	5750d 10h	/trunk
17	finish block_decypher module	simon111	5801d 16h	/trunk
16	add the block_perm and block_sbox	simon111	5805d 08h	/trunk
15	finished key_schedule module	simon111	5809d 10h	/trunk