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[/] [dbg_interface/] [tags/] [asyst_2/] [rtl] - Rev 27

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Rev Log message Author Age Path
27 Warnings from synthesys tools fixed. mohor 8242d 11h /dbg_interface/tags/asyst_2/rtl
26 Warnings from synthesys tools fixed. mohor 8242d 11h /dbg_interface/tags/asyst_2/rtl
25 trst signal is synchronized to wb_clk_i. mohor 8243d 07h /dbg_interface/tags/asyst_2/rtl
23 Trace disabled by default. mohor 8250d 11h /dbg_interface/tags/asyst_2/rtl
22 Register length fixed. mohor 8250d 11h /dbg_interface/tags/asyst_2/rtl
21 CRC is returned when chain selection data is transmitted. mohor 8251d 07h /dbg_interface/tags/asyst_2/rtl
20 Crc generation is different for read or write commands. Small synthesys fixes. mohor 8252d 10h /dbg_interface/tags/asyst_2/rtl
19 Wishbone data latched on wb_clk_i instead of risc_clk. mohor 8264d 11h /dbg_interface/tags/asyst_2/rtl
18 Reset signals are not combined any more. mohor 8266d 20h /dbg_interface/tags/asyst_2/rtl
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8290d 09h /dbg_interface/tags/asyst_2/rtl
15 bs_chain_o added. mohor 8292d 10h /dbg_interface/tags/asyst_2/rtl
13 Signal names changed to lowercase. mohor 8293d 11h /dbg_interface/tags/asyst_2/rtl
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8294d 11h /dbg_interface/tags/asyst_2/rtl
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8315d 07h /dbg_interface/tags/asyst_2/rtl
9 Working version. Few bugs fixed, comments added. mohor 8319d 11h /dbg_interface/tags/asyst_2/rtl
8 Asynchronous set/reset not used in trace any more. mohor 8320d 09h /dbg_interface/tags/asyst_2/rtl
5 Trace fixed. Some registers changed, trace simplified. mohor 8321d 07h /dbg_interface/tags/asyst_2/rtl
2 Initial official release. mohor 8326d 07h /dbg_interface/tags/asyst_2/rtl

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