URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_15/] [bench] - Rev 158

Rev	Log message	Author	Age	Path
158		root	5657d 13h	/dbg_interface/tags/rel_15/bench
109	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7535d 01h	/dbg_interface/tags/rel_15/bench
102	New version.	mohor	7536d 15h	/dbg_interface/tags/rel_15/bench
101	Almost finished.	mohor	7536d 16h	/dbg_interface/tags/rel_15/bench
99	cpu registers added.	mohor	7537d 18h	/dbg_interface/tags/rel_15/bench
96	Working.	mohor	7538d 22h	/dbg_interface/tags/rel_15/bench
95	Temp version.	mohor	7539d 10h	/dbg_interface/tags/rel_15/bench
93	tmp version.	mohor	7540d 21h	/dbg_interface/tags/rel_15/bench
92	temp version.	mohor	7544d 01h	/dbg_interface/tags/rel_15/bench
91	tmp version.	mohor	7544d 20h	/dbg_interface/tags/rel_15/bench
90	tmp version.	mohor	7545d 15h	/dbg_interface/tags/rel_15/bench
89	temp4 version.	mohor	7546d 21h	/dbg_interface/tags/rel_15/bench
88	temp3 version.	mohor	7547d 15h	/dbg_interface/tags/rel_15/bench
87	tmp2 version.	mohor	7548d 20h	/dbg_interface/tags/rel_15/bench
80	New version of the debug interface. Not finished, yet.	mohor	7561d 18h	/dbg_interface/tags/rel_15/bench
75	Simulation files.	mohor	7622d 16h	/dbg_interface/tags/rel_15/bench
73	CRC logic changed.	mohor	7622d 16h	/dbg_interface/tags/rel_15/bench
63	Three more chains added for cpu debug access.	simons	7678d 19h	/dbg_interface/tags/rel_15/bench
47	mon_cntl_o signals that controls monitor mux added.	mohor	8156d 18h	/dbg_interface/tags/rel_15/bench
38	Few outputs for boundary scan chain added.	mohor	8212d 18h	/dbg_interface/tags/rel_15/bench