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[/] [dbg_interface/] [tags/] [rel_19/] [bench] - Rev 101

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Rev Log message Author Age Path
101 Almost finished. mohor 7481d 23h /dbg_interface/tags/rel_19/bench
99 cpu registers added. mohor 7483d 01h /dbg_interface/tags/rel_19/bench
96 Working. mohor 7484d 05h /dbg_interface/tags/rel_19/bench
95 Temp version. mohor 7484d 17h /dbg_interface/tags/rel_19/bench
93 tmp version. mohor 7486d 04h /dbg_interface/tags/rel_19/bench
92 temp version. mohor 7489d 08h /dbg_interface/tags/rel_19/bench
91 tmp version. mohor 7490d 03h /dbg_interface/tags/rel_19/bench
90 tmp version. mohor 7490d 22h /dbg_interface/tags/rel_19/bench
89 temp4 version. mohor 7492d 04h /dbg_interface/tags/rel_19/bench
88 temp3 version. mohor 7492d 22h /dbg_interface/tags/rel_19/bench
87 tmp2 version. mohor 7494d 03h /dbg_interface/tags/rel_19/bench
80 New version of the debug interface. Not finished, yet. mohor 7507d 01h /dbg_interface/tags/rel_19/bench
75 Simulation files. mohor 7567d 23h /dbg_interface/tags/rel_19/bench
73 CRC logic changed. mohor 7567d 23h /dbg_interface/tags/rel_19/bench
63 Three more chains added for cpu debug access. simons 7624d 02h /dbg_interface/tags/rel_19/bench
47 mon_cntl_o signals that controls monitor mux added. mohor 8102d 01h /dbg_interface/tags/rel_19/bench
38 Few outputs for boundary scan chain added. mohor 8158d 01h /dbg_interface/tags/rel_19/bench
36 Structure changed. Hooks for jtag chain added. mohor 8162d 00h /dbg_interface/tags/rel_19/bench
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8302d 04h /dbg_interface/tags/rel_19/bench
15 bs_chain_o added. mohor 8304d 05h /dbg_interface/tags/rel_19/bench

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