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[/] [dbg_interface/] [tags/] [rel_21/] [bench/] [verilog/] [dbg_tb.v] - Rev 102

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Rev Log message Author Age Path
102 New version. mohor 7467d 23h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
101 Almost finished. mohor 7468d 00h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
99 cpu registers added. mohor 7469d 02h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
96 Working. mohor 7470d 06h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
95 Temp version. mohor 7470d 18h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
93 tmp version. mohor 7472d 06h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
92 temp version. mohor 7475d 09h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
91 tmp version. mohor 7476d 04h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
90 tmp version. mohor 7476d 23h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
89 temp4 version. mohor 7478d 05h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
88 temp3 version. mohor 7479d 00h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
87 tmp2 version. mohor 7480d 05h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
80 New version of the debug interface. Not finished, yet. mohor 7493d 03h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
73 CRC logic changed. mohor 7554d 01h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
63 Three more chains added for cpu debug access. simons 7610d 03h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
47 mon_cntl_o signals that controls monitor mux added. mohor 8088d 02h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
38 Few outputs for boundary scan chain added. mohor 8144d 03h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
36 Structure changed. Hooks for jtag chain added. mohor 8148d 02h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8288d 05h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v
15 bs_chain_o added. mohor 8290d 06h /dbg_interface/tags/rel_21/bench/verilog/dbg_tb.v

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