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[/] [dbg_interface/] [tags/] [rel_21/] [bench] - Rev 88

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Rev Log message Author Age Path
88 temp3 version. mohor 7520d 06h /dbg_interface/tags/rel_21/bench
87 tmp2 version. mohor 7521d 11h /dbg_interface/tags/rel_21/bench
80 New version of the debug interface. Not finished, yet. mohor 7534d 09h /dbg_interface/tags/rel_21/bench
75 Simulation files. mohor 7595d 07h /dbg_interface/tags/rel_21/bench
73 CRC logic changed. mohor 7595d 07h /dbg_interface/tags/rel_21/bench
63 Three more chains added for cpu debug access. simons 7651d 09h /dbg_interface/tags/rel_21/bench
47 mon_cntl_o signals that controls monitor mux added. mohor 8129d 09h /dbg_interface/tags/rel_21/bench
38 Few outputs for boundary scan chain added. mohor 8185d 09h /dbg_interface/tags/rel_21/bench
36 Structure changed. Hooks for jtag chain added. mohor 8189d 08h /dbg_interface/tags/rel_21/bench
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8329d 12h /dbg_interface/tags/rel_21/bench
15 bs_chain_o added. mohor 8331d 13h /dbg_interface/tags/rel_21/bench
13 Signal names changed to lowercase. mohor 8332d 13h /dbg_interface/tags/rel_21/bench
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8333d 13h /dbg_interface/tags/rel_21/bench
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8354d 09h /dbg_interface/tags/rel_21/bench
9 Working version. Few bugs fixed, comments added. mohor 8358d 13h /dbg_interface/tags/rel_21/bench
6 Minor changes for simulation. mohor 8359d 11h /dbg_interface/tags/rel_21/bench
5 Trace fixed. Some registers changed, trace simplified. mohor 8360d 09h /dbg_interface/tags/rel_21/bench
2 Initial official release. mohor 8365d 10h /dbg_interface/tags/rel_21/bench

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