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[/] [dbg_interface/] [tags/] [rel_22] - Rev 23

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Rev Log message Author Age Path
23 Trace disabled by default. mohor 8264d 20h /dbg_interface/tags/rel_22
22 Register length fixed. mohor 8264d 20h /dbg_interface/tags/rel_22
21 CRC is returned when chain selection data is transmitted. mohor 8265d 16h /dbg_interface/tags/rel_22
20 Crc generation is different for read or write commands. Small synthesys fixes. mohor 8266d 19h /dbg_interface/tags/rel_22
19 Wishbone data latched on wb_clk_i instead of risc_clk. mohor 8278d 20h /dbg_interface/tags/rel_22
18 Reset signals are not combined any more. mohor 8281d 05h /dbg_interface/tags/rel_22
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8304d 18h /dbg_interface/tags/rel_22
16 bs_chain_o port added. mohor 8306d 18h /dbg_interface/tags/rel_22
15 bs_chain_o added. mohor 8306d 19h /dbg_interface/tags/rel_22
14 Document updated. mohor 8307d 17h /dbg_interface/tags/rel_22
13 Signal names changed to lowercase. mohor 8307d 20h /dbg_interface/tags/rel_22
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8308d 20h /dbg_interface/tags/rel_22
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8329d 16h /dbg_interface/tags/rel_22
10 First official release 1.0. mohor 8333d 20h /dbg_interface/tags/rel_22
9 Working version. Few bugs fixed, comments added. mohor 8333d 20h /dbg_interface/tags/rel_22
8 Asynchronous set/reset not used in trace any more. mohor 8334d 18h /dbg_interface/tags/rel_22
7 First official release 1.0. mohor 8334d 18h /dbg_interface/tags/rel_22
6 Minor changes for simulation. mohor 8334d 18h /dbg_interface/tags/rel_22
5 Trace fixed. Some registers changed, trace simplified. mohor 8335d 16h /dbg_interface/tags/rel_22
4 Initial official release. mohor 8340d 16h /dbg_interface/tags/rel_22

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