OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rev_23] - Rev 75

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
75 Simulation files. mohor 7572d 03h /dbg_interface/tags/rev_23
74 Removed. mohor 7572d 03h /dbg_interface/tags/rev_23
73 CRC logic changed. mohor 7572d 04h /dbg_interface/tags/rev_23
71 Mbist support added. simons 7574d 10h /dbg_interface/tags/rev_23
70 A pdf copy of existing doc document. simons 7581d 12h /dbg_interface/tags/rev_23
69 WBCNTL added, multiple CPU support described. simons 7602d 01h /dbg_interface/tags/rev_23
67 Lower two address lines must be always zero. simons 7607d 06h /dbg_interface/tags/rev_23
65 WB_CNTL register added, some syncronization fixes. simons 7608d 05h /dbg_interface/tags/rev_23
63 Three more chains added for cpu debug access. simons 7628d 06h /dbg_interface/tags/rev_23
61 Lapsus fixed. simons 7656d 06h /dbg_interface/tags/rev_23
59 Reset value for riscsel register set to 1. simons 7656d 06h /dbg_interface/tags/rev_23
57 Multiple cpu support added. simons 7656d 07h /dbg_interface/tags/rev_23
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7923d 04h /dbg_interface/tags/rev_23
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7923d 04h /dbg_interface/tags/rev_23
53 Trst active high. Inverted on higher layer. mohor 7923d 05h /dbg_interface/tags/rev_23
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7923d 05h /dbg_interface/tags/rev_23
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7950d 17h /dbg_interface/tags/rev_23
50 Revision 1.5 of the document ready. WISHBONE Scan Chain changed. mohor 7950d 18h /dbg_interface/tags/rev_23
47 mon_cntl_o signals that controls monitor mux added. mohor 8106d 05h /dbg_interface/tags/rev_23
46 Asynchronous reset used instead of synchronous. mohor 8114d 11h /dbg_interface/tags/rev_23

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.