URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [sdram_test_working/] [rtl/] [verilog/] [dbg_top.v] - Rev 13

Rev	Log message	Author	Age	Path
13	Signal names changed to lowercase.	mohor	8309d 11h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
12	Wishbone interface added, few fixes for better performance, hooks for boundary scan testing added.	mohor	8310d 11h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
11	Changes connected to the OpenRISC access (SPR read, SPR write).	mohor	8331d 07h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
9	Working version. Few bugs fixed, comments added.	mohor	8335d 11h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
8	Asynchronous set/reset not used in trace any more.	mohor	8336d 09h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
5	Trace fixed. Some registers changed, trace simplified.	mohor	8337d 07h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v
2	Initial official release.	mohor	8342d 07h	/dbg_interface/tags/sdram_test_working/rtl/verilog/dbg_top.v