URL https://opencores.org/ocsvn/dblclockfft/dblclockfft/trunk

Subversion Repositories dblclockfft

[/] [dblclockfft/] [trunk/] [sw/] [Makefile] - Rev 5

Rev	Log message	Author	Age	Path
5	The butterfly_tb is now written, and the butterfly succeeds at the test bench!	dgisselq	3422d 01h	/dblclockfft/trunk/sw/Makefile
3	The first upload of the s/w didn't take. Had it taken, the comment would've been: This is the first upload of the double clocked FFT software. While it should (roughly) be complete, a lot of work remains to be done--primarily in building test benches, modifying the interface of fftgen to make it more friendly, etc. In fact, the c++ code not only compiles, but the Verilog code it produces actually builds as well! Now, however, I have several test benches written, and have verified the unit functionality of the multiply, bit reversal stage, the dblstage (FFT len 2), and the qtrstage (FFT len 4). I then took a closer look at the multiply, discovered it failed at signed integers and rebuilt it. The new test bench tests the full 16-bit signed integer support properly. This leaves butterflies and generic FFT stages that still need test benches, as does the main (I)FFT program.	dgisselq	3422d 07h	/dblclockfft/trunk/sw/Makefile
2	Here's an attempt at a first subversion update.	dgisselq	3422d 07h	/dblclockfft/trunk/sw/Makefile